The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 1993

Filed:

Jul. 18, 1991
Applicant:
Inventors:

Satoshi Kaneko, Yokohama, JP;

Taichi Fugita, Yamato, JP;

Toshihisa Nozawa, Yokohama, JP;

Yoichi Ueda, Yokohama, JP;

Yukimasa Yoshida, Yokohama, JP;

Isahiro Hasegawa, Zushi, JP;

Haruo Okano, Tokyo, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23F / ;
U.S. Cl.
CPC ...
20429833 ; 156345 ; 20429809 ; 20429815 ; 20429834 ;
Abstract

A semiconductor wafers processing apparatus comprises a susceptor for mounting and fixing a wafer thereon, a cooling jacket for cooling the susceptor, a process chamber whose wall encloses the susceptor and the cooling jacket, an O-ring for shielding from process atmosphere in the process chamber a clearance formed between an inner cylinder of the process chamber wall and the outer circumferences of the susceptor and the cooling jacket, and an exhaust pump for exhausting gas in the clearance. It further comprises load lock chambers for carrying the wafer into and out of the process chamber, and heat insulating members interposed between those faces of the process chamber and each of the load lock chambers which are opposed to each other. The process chamber wall can be heat-insulated from the susceptor and the cooling jacket by the exhausted clearance and the process chamber can be heat-insulated from each of the load lock chambers by the heat insulating members.


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