The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 1987

Filed:

Jun. 12, 1985
Applicant:
Inventors:

Werner A Metz, Jr, Fort Collins, CO (US);

Nicholas J Szluk, Fort Collins, CO (US);

Gayle W Miller, Fort Collins, CO (US);

Michael J Drury, Fort Collins, CO (US);

Paul A Sullivan, Fort Collins, CO (US);

Assignee:

NCR Corporation, Dayton, OH (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
29589 ; 29590 ; 29591 ; 427 88 ; 148191 ;
Abstract

A process for using selectively deposited tungsten in the making of ohmic contacts and contact/interconnect metallization patterns. In one form the process is employed to interconnect fully formed field effect devices using contacts through the dielectric layer. A thin layer of intrinsic polysilicon or amorphous silicon is conformally deposited, patterned and covered by selectively deposited tungsten, An anneal operation then forms self-aligned contacts or shunts, between the tungsten layer and the source/drain type diffusions exposed during the contact cut, by updiffusion through the thin intrinsic silicon, or by conversion of the thin intrinsic silicon to tungsten. Alternatively, contacts and shunts can be formed using polysilicon layers without regard to impurity type by making contact cuts through the dielectric to expose substrate regions, patterning a deposited polysilicon layer to cover only parts of such exposed regions, forming the field effect device source/drain regions, and then selectively depositing tungsten on all exposed surfaces of silicon. The tungsten thereby bridges the polysilicon layer to the adjacent, exposed substrate region and shunts all surface adjacent p-n junctions, including the polysilicon-to-substrate contact junction.


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