The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2026

Filed:

Aug. 12, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chih-Wei Wu, Yilan County, TW;

Ying-Ching Shih, Hsinchu, TW;

Wen-Chih Chiou, Miaoli County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H10W 20/20 (2026.01); H10W 70/05 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/20 (2026.01); H10W 70/05 (2026.01); H10W 70/095 (2026.01); H10W 70/685 (2026.01); H10W 74/014 (2026.01); H10W 74/131 (2026.01); H10W 90/724 (2026.01);
Abstract

A package includes a first molding compound layer, a conductive via embedded in the first molding compound layer, a semiconductor device, a redistribution structure and a second molding compound layer. The semiconductor device and the redistribution structure are respectively disposed on opposite sides of the first molding compound layer, wherein the semiconductor device is electrically connected to the redistribution structure through the conductive via. The second molding compound layer is disposed on the first molding compound layer, wherein the semiconductor device is encapsulated by the second molding compound layer.


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