The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2026
Filed:
Apr. 13, 2023
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
Wei-An Tsao, Yuanlin Township, TW;
Yu-Hsiang Hu, Hsinchu City, TW;
PO-Han Wang, Hsinchu City, TW;
Hung-Jui Kuo, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
Abstract
A method of forming a semiconductor structure is provided, which includes forming via structures over a first carrier wafer. A unit via assembly structure is repeated in two directions over the first carrier wafer. Each instance of the unit via assembly is formed within a respective unit area of repetition. Each instance of the unit via assembly includes through integrated-fan-out via (TIV) structures and two alignment mark via assemblies located in two corner regions of a respective unit area and are diagonally spaced apart from each other. Corner locations of the unit areas of repetition may be identified using the alignment mark via assemblies within unit areas of repetition. At least one local silicon interconnect (LSI) bridge may be placed within each unit area of repetition using a pick and place tool.