The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Nov. 07, 2023
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Yang-Chih Hsueh, Hsinchu, TW;
Yan-Zuo Tsai, Hsinchu, TW;
Ming-Tsu Chung, Hsinchu, TW;
Yung-Chi Lin, Su-Lin City, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 42/00 (2026.01); H10P 30/40 (2026.01); H10P 74/20 (2026.01); H10W 20/43 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 42/121 (2026.01); H10P 30/40 (2026.01); H10P 74/203 (2026.01); H10W 20/43 (2026.01); H10W 90/792 (2026.01); H10W 90/794 (2026.01);
Abstract
A method includes depositing a dielectric layer on a package component having a first warpage, and performing an implantation process to implant the dielectric layer with a stress modulation dopant. After the implantation process, the package component has a second warpage smaller than the first warpage.