The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Apr. 14, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Chao-Yang Chen, Hsin-Chu, TW;
Chun-Yang Tsai, Hsinchu City, TW;
Kuo-Ching Huang, Hsinchu City, TW;
Wen-Ting Chu, Kaohsiung City, TW;
Pili Huang, Hsin-Chu, TW;
Cheng-Jun Wu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes forming a reactivity reducing coating over one or more lower interconnect layers disposed over a substrate. A bottom electrode layer is formed on and in contact with the reactivity reducing coating. The bottom electrode layer has a first electronegativity that is less than or equal to a second electronegativity of the reactivity reducing coating. A data storage element is formed over the bottom electrode layer and a top electrode layer is formed over the data storage element. The top electrode layer, the data storage element, the reactivity reducing coating, and the bottom electrode layer are patterned to define a memory device.