The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

May. 17, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Fu-Chiang Kuo, Hsinchu City, TW;

Hsin-Liang Chen, Hsinchu City, TW;

Hsin-Li Cheng, Hsinchu, TW;

Ting-Chen Hsu, Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10P 14/60 (2026.01); H10D 1/00 (2025.01); H10D 1/66 (2025.01); H10P 14/69 (2026.01); H10P 14/692 (2026.01); H10P 14/694 (2026.01); H10P 76/20 (2026.01); H10P 76/40 (2026.01); H10W 20/00 (2026.01);
U.S. Cl.
CPC ...
H10D 1/047 (2025.01); H10D 1/665 (2025.01); H10P 14/6334 (2026.01); H10P 14/6905 (2026.01); H10P 14/69215 (2026.01); H10P 14/69433 (2026.01); H10P 76/2041 (2026.01); H10P 76/405 (2026.01); H10P 76/408 (2026.01); H10W 20/069 (2026.01);
Abstract

The present disclosure provides an embodiment of a method. The method includes patterning a substrate to form trenches; etching the substrate, thereby modifying the trenches with round tips; forming a stack including conductive layers and dielectric layers in the trenches, wherein the conductive layers and the dielectric layers alternate with one another within the stack; forming an insulating compressive film in the trenches, thereby sealing voids in the trenches; and forming conductive plugs connected to the conductive layers, respectively.


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