The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

Jan. 31, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chih-Wei Wu, Yilan County, TW;

Wen-Chih Chiou, Miaoli County, TW;

Ying-Ching Shih, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 70/60 (2026.01); H10W 70/05 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 90/00 (2026.01); H10W 72/20 (2026.01);
U.S. Cl.
CPC ...
H10W 70/611 (2026.01); H10W 70/05 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 72/252 (2026.01); H10W 90/724 (2026.01); H10W 90/754 (2026.01);
Abstract

Provided are a package structure having a joint structure and a method of forming the same. The package structure includes: a first under bump metallurgy (UBM) structure disposed on a first dielectric layer, wherein the first UBM structure at least comprises: a barrier layer embedded in the first dielectric layer; and an upper metal layer disposed over the barrier layer, wherein a sidewall of the barrier layer is laterally offset outward from a sidewall of the upper metal layer, and a portion of a top surface of the barrier layer is exposed by the first dielectric layer; and a solder layer disposed on the first UBM structure and contacting the upper metal layer.


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