The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2026
Filed:
Oct. 06, 2023
Applied Materials, Inc., Santa Clara, CA (US);
Allison Yau, Mountain View, CA (US);
Manoj Kumar Jana, San Jose, CA (US);
Wen-Shan Lin, San Jose, CA (US);
Zhiling Dun, Campbell, CA (US);
Xinhai Han, Palo Alto, CA (US);
Deenesh Padhi, Saratoga, CA (US);
Jian Li, Fremont, CA (US);
Yuanchang Chen, Santa Clara, CA (US);
Wenhao Zhang, San Jose, CA (US);
Edward P. Hammond, Hillsborough, CA (US);
Alexander V. Garachtchenko, Brentwood, CA (US);
Ganesh Balasubramanian, Fremont, CA (US);
Juan Carlos Rocha-Alvarez, San Carlos, CA (US);
Sathya Ganta, Sunnyvale, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A semiconductor processing chamber may include a pedestal configured to support a substrate during a plasma-enhanced chemical-vapor deposition (PECVD) process that forms a film on a surface of the substrate. The chamber may also include one or more internal meshes embedded in the pedestal. The one or more internal meshes may be configured to deliver radio-frequency (RF) power to a plasma in the semiconductor processing chamber during the PECVD process. An outer diameter of the one or more internal meshes may be less that a diameter of the substrate. The chamber may further include an RF source configured to deliver the RF power to the one more internal meshes. This configuration may reduce arcing within the processing chamber.