The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2026
Filed:
Jun. 30, 2022
Intel Corporation, Santa Clara, CA (US);
Abhishek Anil Sharma, Portland, OR (US);
Tahir Ghani, Portland, OR (US);
Rishabh Mehandru, Portland, OR (US);
Anand S. Murthy, Portland, OR (US);
Wilfred Gomes, Portland, OR (US);
Cory Weber, Hillsboro, OR (US);
Sagar Suthram, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Structures having raised epitaxy on channel structure transistors are described. In an example, an integrated circuit structure includes a channel structure having multi-layer epitaxial source or drain structures thereon, the multi-layer epitaxial source or drain structures having a recess extending there through. A gate dielectric layer is on a bottom and along sides of the recess and laterally surrounded by the epitaxial source or drain structures. A gate electrode is on and laterally surrounded by the gate dielectric layer. The gate electrode has an uppermost surface below an uppermost surface of the gate dielectric layer.