The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Aug. 10, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Meng-Sheng Chang, Chu-bei City, TW;

Chia-En Huang, Xinfeng Township, TW;

Yi-Ching Liu, Hsinchu City, TW;

Yih Wang, Hsinchu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/24 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/102 (2013.01); G11C 16/0433 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01);
Abstract

Provided are related to a memory array including one-time programmable (OTP) cells. The memory array includes a first set of one-time programmable (OTP) cells connected between a first program control line and a first bit line. Each OTP cell of the first set of OTP cells includes a programmable storage device and a switch connected between the first program control line and the first bit line. The first program control line extends towards a first side of the memory array along a first direction. The first bit line extends towards a second side of the memory array facing away from the first side of the memory array. Each switch of the first set of OTP cells includes a gate electrode coupled to a corresponding read control line extending along a second direction traversing the first direction.


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