The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Jan. 10, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Hung-Yi Kuo, Taipei City, TW;
Chen-Hua Yu, Hsinchu, TW;
Kuo-Chung Yee, Taoyuan City, TW;
Yu-Jen Lien, Tainan City, TW;
Ke-Han Shen, Chiayi City, TW;
Wei-Kong Sheng, Chu-Nan, TW;
Chung-Shi Liu, Hsinchu, TW;
Szu-Wei Lu, Hsinchu, TW;
Tsung-Fu Tsai, Changhua City, TW;
Chung-Ju Lee, Hsinchu, TW;
Chih-Ming Ke, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.