The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Apr. 24, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chuei-Tang Wang, Taichung City, TW;
Chung-Hao Tsai, Huatan Township, Changhua County, TW;
Chen-Hua Yu, Hsinchu City, TW;
Wei-Ting Chen, Tainan City, TW;
Chia-Chia Lin, Kaohsiung City, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method for forming a chip package structure is provided. The method includes providing a first substrate and a second substrate. The first substrate includes a first semiconductor base and a first bonding line over a front surface of the first semiconductor base, and the second substrate includes a second semiconductor base and a second bonding line over the second semiconductor base. The method includes bonding the second substrate to the first substrate. The first bonding line is in contact with the second bonding line. The method includes forming a conductive line over a back surface of the first semiconductor base. The conductive line is thicker than the first bonding line. The method includes forming a conductive bump over the back surface of the first semiconductor base. The conductive line is between the conductive bump and the first semiconductor base.