The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
Nov. 25, 2021
Intel Corporation, Santa Clara, CA (US);
Bok Eng Cheah, Gelugor Pulau Penang, MY;
Chia Chuan Wu, Butterworth, MY;
Jackson Chung Peng Kong, Tanjung Tokong Pulau Penang, MY;
Kooi Chi Ooi, Gelugor Pulau Pinang, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
The present disclosure is directed to semiconductor packages, and methods for making them, which includes a package substrate, an interposer with a redistribution layer positioned on the interposer. A recess may be formed in a bottom surface in the interposer and a plurality of through silicon vias may be formed in the interposer, including the recess, that are coupled to a bottom surface of the redistribution layer. A recess device may be positioned in the recess and coupled to the redistribution layer. A top-side device may be positioned on and coupled to a top surface of the redistribution layer, and a footprint of the top-side device may be aligned to overlap the recess device. In an aspect, the recess device and the top-side device may be stacked memory devices, e.g., DRAMs, SRAMs, and/or other memory devices.