The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Mar. 23, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chun-Fu Lu, Hsinchu, TW;

Chih-Hao Wang, Baoshan Township, Hsinchu County, TW;

Wang-Chun Huang, Kaohsiung, TW;

Kuo-Cheng Chiang, Zhubei City, TW;

Mao-Lin Huang, Hsinchu City, TW;

Jia-Ni Yu, New Taipei City, TW;

Lung-Kun Chu, New Taipei City, TW;

Chung-Wei Hsu, Baoshan Township, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/63 (2025.01); H10D 30/69 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01); H10D 64/68 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/025 (2025.01); H10D 30/0415 (2025.01); H10D 30/63 (2025.01); H10D 30/701 (2025.01); H10D 64/018 (2025.01); H10D 64/667 (2025.01); H10D 64/689 (2025.01); H10D 84/017 (2025.01); H10D 84/0177 (2025.01); H10D 84/0181 (2025.01); H10D 84/0188 (2025.01); H10D 84/0195 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01);
Abstract

A method for manufacturing a semiconductor structure includes forming first and second channel layers over a substrate, forming first source/drain features over the first and second channel layers, forming a gate dielectric layer wrapping around the first and second channel layers, forming a first work function layer wrapping around the gate dielectric layer, forming a hard mask layer wrapping around the first work function layer, removing portions of the hard mask layer and the first work function layer, removing the hard mask layer and the first work function layer wrapping around the second channel layer, removing the hard mask layer wrapping around the first channel layer, forming a second work function layer wrapping around the first work function layer and the second channel layer, forming a metal material between the second work function layer, and forming second source/drain features under the first and second channel layers.


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