The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

Jul. 28, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hung-Chang Sun, Kaohsiung City, TW;

Yu-Wei Jiang, Hsinchu, TW;

Tsuching Yang, Taipei, TW;

Kuo-Chang Chiang, Hsinchu City, TW;

Sheng-Chih Lai, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 43/10 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 43/10 (2023.02);
Abstract

A memory device includes a multi-layer stack disposed on a substrate and including conductive layers and dielectric layers stacked alternately, a channel layer penetrating through the conductive layers and the dielectric layers, a charge storage layer disposed between the conductive layers and the channel layer, an insulating layer penetrating through the conductive layers and the dielectric layers and disposed between the charge storage layer and the multi-layer stack, and a first conductive pillar and a second conductive pillar enclosed by the channel layer.


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