The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

Jul. 01, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek Anil Sharma, Portland, OR (US);

Wilfred Gomes, Portland, OR (US);

Tahir Ghani, Portland, OR (US);

Anand Murthy, Portland, OR (US);

Rajabali Koduri, Saratoga, CA (US);

Clifford Ong, Portland, OR (US);

Sagar Suthram, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 89/10 (2025.01); G11C 11/412 (2006.01); G11C 11/415 (2006.01); G11C 11/419 (2006.01); H10B 10/00 (2023.01); G11C 5/02 (2006.01); G11C 11/16 (2006.01); G11C 11/413 (2006.01);
U.S. Cl.
CPC ...
H10B 10/12 (2023.02); G11C 11/412 (2013.01); G11C 11/415 (2013.01); G11C 11/419 (2013.01); H10B 10/15 (2023.02); H10D 89/10 (2025.01); G11C 5/025 (2013.01); G11C 11/1653 (2013.01); G11C 11/413 (2013.01); H10B 10/125 (2023.02);
Abstract

Stacked static random-access memory (SRAM) circuits have doubled word length for a given SRAM cell area. An integrated circuit (IC) die includes stacked SRAM cells in vertically adjacent device layers with access transistors connected to a common wordline. The IC die with stacked SRAM cells having a common word line may be attached to a substrate and coupled to a power supply and, advantageously, to an active-cooling structure. SRAM cells may be formed in vertically adjacent layers of a substrate and electrically connected at their access transistor gate electrodes.


Find Patent Forward Citations

Sharma, Abhishek. (2026). Stacked sram with shared wordline connection (U.S. Patent No. 12615752). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12615752

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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