The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Apr. 17, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chien-Yuan Chen, Hsinchu, TW;

Jui-Ping Lin, Hsinchu, TW;

Chen-Ming Lee, Yangmei, TW;

Fu-Kai Yang, Hsinchu, TW;

Mei-Yun Wang, Chu-Pei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/03 (2025.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H10D 84/01 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H10D 84/0186 (2025.01); H10D 84/0193 (2025.01); H10D 84/853 (2025.01);
Abstract

An embodiment method includes: forming fins extending from a semiconductor substrate; depositing an inter-layer dielectric (ILD) layer on the fins; forming masking layers on the ILD layer; forming a cut mask on the masking layers, the cut mask including a first dielectric material, the cut mask having first openings exposing the masking layers, each of the first openings surrounded on all sides by the first dielectric material; forming a line mask on the cut mask and in the first openings, the line mask having slot openings, the slot openings exposing portions of the cut mask and portions of the masking layers, the slot openings being strips extending perpendicular to the fins; patterning the masking layers by etching the portions of the masking layers exposed by the first openings and the slot openings; and etching contact openings in the ILD layer using the patterned masking layers as an etching mask.


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Chen, Chien-Yuan. (2026). Methods of forming semiconductor devices (U.S. Patent No. 12563818). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12563818

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