The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Jun. 03, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Munzarin F. Qayyum, Hillsboro, OR (US);

Nicole K. Thomas, Portland, OR (US);

Jami A. Wiedemer, Scappoose, OR (US);

Jack T. Kavalieros, Portland, OR (US);

Marko Radosavljevic, Portland, OR (US);

Willy Rachmady, Beaverton, OR (US);

Cheng-Ying Huang, Hillsboro, OR (US);

Rohit Galatage, Hillsboro, OR (US);

Nitesh Kumar, Beaverton, OR (US);

Kai Loon Cheong, Beaverton, OR (US);

Venkata Vasiraju, Hillsboro, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6735 (2025.01); H10D 30/6713 (2025.01); H10D 30/6729 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 84/853 (2025.01);
Abstract

A semiconductor structure includes an upper device stacked over a lower device. In an example, the upper device includes (i) a first source region, (ii) a first drain region, (iii) a body of semiconductor material extending laterally from the first source region to the first drain region, and (iv) a first gate structure at least in part wrapped around the body. In an example, the lower device includes (i) a second source region, (ii) a second drain region, and (iii) a second gate structure at least in part laterally between the second source region and the second drain region. In an example, the lower device lacks a body of semiconductor material extending laterally from the second source region to the second drain region. In another example, the upper device lacks a body of semiconductor material extending laterally from the first source region to the first drain region.


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