The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Feb. 13, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yong-Jie Wu, Hsinchu, TW;

Yen-Chung Ho, Hsinchu, TW;

Hui-Hsien Wei, Taoyuan, TW;

Chia-Jung Yu, Hsinchu, TW;

Pin-Cheng Hsu, Zhubei, TW;

Mauricio Manfrini, Zhubei, TW;

Chung-Te Lin, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); H01L 21/02 (2006.01); H10D 30/67 (2025.01); H10D 99/00 (2025.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10B 61/22 (2023.02); H01L 21/02565 (2013.01); H10D 30/6728 (2025.01); H10D 30/6735 (2025.01); H10D 30/6755 (2025.01); H10D 30/6757 (2025.01); H10D 99/00 (2025.01); H10N 50/01 (2023.02); H10N 50/80 (2023.02);
Abstract

A memory structure, device, and method of making the same, the memory structure including: a channel comprising a semiconductor material; a source electrode electrically connected to a first end of the channel; a drain electrode electrically connected to an opposing second end of the channel; a high-k dielectric layer surrounding the channel; a gate electrode surrounding the high-k dielectric layer; and a memory cell electrically connected to the drain electrode and a bit line. The memory cell includes a first electrode that is electrically connected to the drain electrode.


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