The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Feb. 06, 2023
Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Chih-Hsien Chiu, Taichung, TW;

Wen-Jung Tsai, Taichung, TW;

Chih-Chiang He, Taichung, TW;

Ko-Wei Chang, Taichung, TW;

Chia-Yang Chen, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 21/56 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01); H01L 25/16 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/56 (2013.01); H01L 25/0652 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H01L 25/50 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01);
Abstract

An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.


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