The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2025

Filed:

Jan. 04, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Zheng-Yong Liang, Hsinchu, TW;

Yu-Yun Peng, Hsinchu, TW;

Keng-Chu Lin, Hsinchu, TW;

Wei-Ting Yeh, Hsinchu, TW;

Chia-Yun Cheng, Hsinchu, TW;

Chen-Hao Wu, Hsinchu, TW;

Yu-Wei Lu, Hsinchu, TW;

Han-De Chen, Hsinchu, TW;

Hsu-Kai Chang, Hsinchu, TW;

Kuei-Lin Chan, Hsinchu, TW;

Kenichi Sano, Hsinchu, TW;

Huang-Lin Chao, Hsinchu, TW;

Cheng-I Chu, Hsinchu, TW;

Yi-Rui Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/02107 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 25/0657 (2013.01); H01L 2224/2745 (2013.01); H01L 2224/27452 (2013.01); H01L 2224/27845 (2013.01); H01L 2224/29082 (2013.01); H01L 2224/29083 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/29176 (2013.01); H01L 2224/29188 (2013.01); H01L 2224/29288 (2013.01); H01L 2224/29339 (2013.01); H01L 2224/29344 (2013.01); H01L 2224/29376 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32505 (2013.01); H01L 2224/83009 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/83201 (2013.01); H01L 2224/83896 (2013.01); H01L 2224/83948 (2013.01); H01L 2924/0532 (2013.01); H01L 2924/05341 (2013.01); H01L 2924/054 (2013.01); H01L 2924/0542 (2013.01); H01L 2924/0543 (2013.01);
Abstract

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.


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