The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Dec. 21, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Yue Deng, Chandler, AZ (US);

Jung Kyu Han, Chandler, AZ (US);

Liang He, Chandler, AZ (US);

Gang Duan, Chandler, AZ (US);

Rahul N. Manepalli, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/16 (2013.01); H01L 23/49811 (2013.01); H01L 24/13 (2013.01); H01L 2224/13109 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/014 (2013.01);
Abstract

A computer apparatus includes a hierarchy of solder joints in a multi-chip package, with solder joints at different levels of the packaging having different melting temperatures. Interconnections, such as pads or pins, on integrated circuit (IC) die can be electrically coupled to ends of contact pillars with solder joints having a higher melting temperature. The other ends of the contact pillars can electrically couple to another substrate or another device with solder joints having a lower melting temperature. The contact pillars can be, for example, a contact array or through-hole via in a substrate.


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