The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Sep. 21, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tsung-Yuan Yu, Taipei, TW;

Hung-Yi Kuo, Taipei, TW;

Cheng-Chieh Hsieh, Tainan, TW;

Hao-Yi Tsai, Hsinchu, TW;

Chung-Ming Weng, Taichung, TW;

Hua-Kuei Lin, Hsinchu, TW;

Che-Hsiang Hsu, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); G02B 6/12 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
G02B 6/4251 (2013.01); G02B 6/12002 (2013.01); G02B 6/12004 (2013.01); H01L 25/167 (2013.01); G02B 6/12 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/121 (2013.01); H01L 23/562 (2013.01);
Abstract

A photonic integrated circuit has a central region and a peripheral region surrounding the central region. The photonic integrated circuit includes a semiconductor layer, a seal ring structure, and a plurality of silicon waveguides. The seal ring structure is disposed on the semiconductor layer. The seal ring structure is located in the peripheral region and has at least one recess recessing towards the central region from a top view. The seal ring structure is a continuous structure from the top view. The silicon waveguides are embedded in the semiconductor layer.


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