The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Oct. 25, 2022
Chipbond Technology Corporation, Hsinchu, TW;
Chin-Tang Hsieh, Kaohsiung, TW;
You-Ming Hsu, Kaohsiung, TW;
Chun-Ting Kuo, Kaohsiung, TW;
Lung-Hua Ho, Hsinchu, TW;
Chih-Ming Kuo, Hsinchu County, TW;
CHIPBOND TECHNOLOGY CORPORATION, Hsinchu, TW;
Abstract
A semiconductor structure includes a substrate, a dielectric layer, a connection layer and wire layers. The dielectric layer is disposed on a surface of the substrate and includes vias showing the surface. The connection layer is disposed on the dielectric layer, a first connection portion of the connection layer is located in the vias and connected to the surface, a second connection portion of the connection layer is connected to the dielectric layer. A first ground portion of the ground metal layer is connected to the first connection portion of the connection layer, and a second ground portion of the ground metal layer is connected to the second connection portion of the connection layer. Each of the wire layers is disposed on the second connection portion of the connection layer, and the second ground portion is located between the adjacent wire layers.