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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12408440 B1

PDFFull Text
Date of Patent:
Sep. 02, 2025

Filed:

Jun. 05, 2024

Method of making amphi-fet structure and method of designing

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chih-Yu Lai, Hsinchu, TW;

Chih-Liang Chen, Hsinchu, TW;

Chi-Yu Lu, Hsinchu, TW;

Shang-Syuan Ciou, Hsinchu, TW;

Hui-Zhong Zhuang, Hsinchu, TW;

Ching-Wei Tsai, Hsinchu, TW;

Shang-Wen Chang, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Jonathan Han

Int. Cl.
CPC ...
H10D 88/00 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 88/101 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 21/0259 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/5283 (2013.01); H10D 30/031 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 84/0128 (2025.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 88/01 (2025.01);
Abstract

A semiconductor device includes a substrate. The semiconductor device further includes a first gate structure on a first side of the substrate. The semiconductor device further includes a second gate structure on a second side of the substrate, wherein the first side is opposite the second side. The semiconductor device further includes a gate via extending through the substrate, wherein the gate via directly connects to the first gate structure, and the gate via directly connects to the second gate structure.

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