The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2025

Filed:

Apr. 10, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Po-Chen Lai, Hsinchu County, TW;

Ming-Chih Yew, Hsinchu, TW;

Po-Yao Lin, Zhudong Township, Hsinchu County, TW;

Chin-Hua Wang, New Taipei, TW;

Shin-Puu Jeng, Po-Shan Village, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/42 (2006.01); H01L 23/433 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3675 (2013.01); H01L 21/4817 (2013.01); H01L 23/49833 (2013.01); H01L 25/0655 (2013.01); H01L 23/42 (2013.01); H01L 23/433 (2013.01); H01L 23/49816 (2013.01); H01L 24/73 (2013.01); H01L 2924/1611 (2013.01); H01L 2924/16152 (2013.01); H01L 2924/16251 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/35121 (2013.01);
Abstract

A method of forming a semiconductor package structure is provided. The method includes disposing a first semiconductor device on an interposer substrate, disposing the interposer substrate on a carrier substrate, applying a thermal interface material on the first semiconductor device, and attaching a lid on the carrier substrate to cover the first semiconductor device. The interposer substrate is disposed between the carrier substrate and the first semiconductor device. The lid includes a lower surface having a first recess facing the first semiconductor device, and a portion of the thermal interface material is accommodated in the first recess.


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