The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2025
Filed:
Mar. 03, 2022
Applicant:
Asm Ip Holding B.v., Almere, NL;
Inventors:
Lifu Chen, Helsinki, FI;
Qi Xie, Wilsele, BE;
Charles Dezelah, Helsinki, FI;
Petro Deminskyi, Helsinki, FI;
Giuseppe Alessio Verni, Jodoigne, BE;
Petri Raisanen, Gilbert, AZ (US);
Eric James Shero, Phoenix, AZ (US);
Assignee:
ASM IP Holding B.V., Almere, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23C 16/32 (2006.01); C23C 16/08 (2006.01); C23C 16/455 (2006.01); C23C 16/52 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0228 (2013.01); C23C 16/08 (2013.01); C23C 16/45527 (2013.01); C23C 16/45544 (2013.01); C23C 16/45553 (2013.01); C23C 16/52 (2013.01); H01L 21/02194 (2013.01); H01L 21/02205 (2013.01);
Abstract
Disclosed are methods and systems for depositing layers comprising a titanium, aluminum, and carbon. The layers are formed onto a surface of a substrate. The deposition process comprises a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.