The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2025
Filed:
Feb. 08, 2024
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chih-Ching Wang, Kinmen, TW;
Wei-Yang Lee, Taipei, TW;
Ming-Chang Wen, Kaohsiung, TW;
Jo-Tzu Hung, Hsinchu, TW;
Wen-Hsing Hsieh, Hsinchu, TW;
Kuan-Lun Cheng, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
Embodiments of the present disclosure provide a semiconductor device structure including a first channel layer formed of a first material, wherein the first channel layer has a first width, a second channel layer formed of a second material different from the first material, wherein the second channel layer has a second width less than the first width, and the second channel layer is in contact with a first surface of the first channel layer. The structure also includes a third channel layer formed of the second material, wherein the third channel layer has a third width less than the second width, and the third channel layer is in contact with a second surface of the first channel layer. The structure also includes a gate dielectric layer conformally disposed on the first channel layer, the second channel layer, and the third channel layer, and a gate electrode layer disposed on the gate dielectric layer.