The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2025

Filed:

Apr. 28, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chih-Chuan Yang, Hsinchu, TW;

Chao-Yuan Chang, New Taipei, TW;

Shih-Hao Lin, Hsinchu, TW;

Chia-Hao Pao, Kaohsiung, TW;

Feng-Ming Chang, Zhubei, TW;

Lien-Jung Hung, Taipei, TW;

Ping-Wei Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); H10B 10/00 (2023.01); G06F 30/3953 (2020.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10B 10/18 (2023.02); G06F 30/392 (2020.01); G06F 30/398 (2020.01); H10B 10/125 (2023.02); G06F 30/3953 (2020.01); H10D 84/854 (2025.01);
Abstract

The present disclosure describes a memory structure including a memory cell array. The memory cell array includes memory cells and first n-type wells extending in a first direction. The memory structure also includes a second n-type well formed in a peripheral region of the memory structure. The second n-type well extends in a second direction and is in contact with a first n-type well of the first n-type wells. The memory structure further includes a pick-up region formed in the second n-type well. The pick-up region is electrically coupled to the first n-type well of first n-type wells.


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