The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2025
Filed:
Jul. 28, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Tai-Yen Peng, Hsinchu, TW;
Chien-Chung Huang, Taichung, TW;
Yu-Shu Chen, Hsinchu, TW;
Sin-Yi Yang, Taichung, TW;
Chen-Jung Wang, Hsinchu, TW;
Han-Ting Lin, Hsinchu, TW;
Chih-Yuan Ting, Taipei, TW;
Jyu-Horng Shieh, Hsinchu, TW;
Hui-Hsien Wei, Taoyuan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
An integrated circuit includes a metallization pattern having first and second conductive features, an etch stop layer over the metallization pattern, a memory device, a bottom electrode via, a third conductive feature, and a dielectric feature. The etch stop layer has first and second portions over the first and second conductive features, respectively. The bottom electrode via is in the first portion of the etch stop layer and electrically connecting the memory device over the first portion of the etch stop layer to the first conductive feature. The third conductive feature is in the second portion of the etch stop layer and electrically connected to the second conductive feature. The dielectric feature is between the first and second portions of the etch stop layer and in contact with sidewalls of the first and second portions of the etch stop layer.