The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2025

Filed:

Dec. 30, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chun-Hung Wu, New Taipei, TW;

Chia-Ling Chung, Hsinchu, TW;

Su-Hao Liu, Jhongpu Township, TW;

Liang-Yin Chen, Hsinchu, TW;

Shun-Wu Lin, Hsinchu, TW;

Huicheng Chang, Tainan, TW;

Yee-Chia Yeo, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H01L 21/425 (2006.01); H10D 30/67 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 62/118 (2025.01); H01L 21/425 (2013.01); H10D 30/6713 (2025.01); H10D 30/6757 (2025.01); H10D 84/013 (2025.01); H10D 84/038 (2025.01);
Abstract

A method of forming a semiconductor device including performing an ion implantation on a substrate and etching the substrate and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a transistor on a first side of a substrate; performing an ion implantation on a second side of the substrate opposite the first side; after performing the ion implantation, etching the substrate to remove the substrate and form a first recess; and forming a dielectric layer in the first recess.


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