The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2025
Filed:
Jul. 25, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Yu-Chu Lin, Tainan, TW;
Chi-Chung Jen, Kaohsiung, TW;
Chia-Ming Pan, Tainan, TW;
Su-Yu Yeh, Tainan, TW;
Keng-Ying Liao, Tainan, TW;
Chih-Wei Sung, Kaohsiung, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A method includes sequentially depositing a floating gate layer, a dielectric structure stack, and a control gate layer over a substrate. A first etching process is performed to pattern the control gate layer, the dielectric structure stack, and a top portion of the floating gate layer to form a control gate, a dielectric structure, and a top portion of a floating gate over a bottom portion of the floating gate layer. A sidewall of the top portion of the floating gate is concave. A first spacer structure is formed on the sidewall of the top portion of the floating gate, a sidewall of the dielectric structure, and a sidewall of the control gate. A second etching process is performed to pattern the bottom portion of the floating gate layer to form a bottom portion of the floating gate after forming the first spacer structure.