The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2025
Filed:
Jun. 14, 2021
Intel Corporation, Santa Clara, CA (US);
Georgios Dogiamis, Chandler, AZ (US);
Qiang Yu, Saratoga, CA (US);
Feras Eid, Chandler, AZ (US);
Adel Elsherbini, Tempe, AZ (US);
Kimin Jun, Portland, OR (US);
Johanna Swan, Scottsdale, AZ (US);
Shawna Liff, Scottsdale, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit (IC) package may be fabricated having an interposer, one or more microfluidic channels through the interposer, a first IC chip attached to a first side of the interposer, and a second IC chip attached to a second side of the interposer, where the first side of the interposer includes first bond pads coupled to first bond pads of the first IC chip, and the second side of the interposer includes second bond pads coupled to first bond pads of the second IC chip. In an embodiment of the present description, a liquid cooled three-dimensional IC (3DIC) package may be formed with the IC package, where at least two IC devices may be stacked with a liquid cooled interposer. In a further embodiment, the liquid cooled 3DIC package may be electrically attached to an electronic board. Other embodiments are disclosed and claimed.