The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2025
Filed:
Jul. 30, 2021
Wafer level package with polymer layer delamination prevention design and method of forming the same
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Kai-Heng Chen, New Taipei, TW;
Pei-Haw Tsao, Tai-chung, TW;
Shyue-Ter Leu, Hsinchu, TW;
Rung-De Wang, Taoyuan, TW;
Chien-Chun Wang, Taoyuan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A package structure is provided, including a substrate, a first passivation layer, a metallization layer, a second passivation layer, and a polymer layer. The first passivation layer is formed over the substrate. The metallization layer is conformally formed on the first passivation layer. The second passivation layer is conformally formed on the first passivation layer and the metallization layer. A step structure is formed on the top surface of the second passivation layer, and includes at least one lower part that is lower than the other parts of the step structure. The polymer layer is formed over the second passivation layer. A portion of the polymer layer extends into the lower part of the step structure to engage with the step structure.