The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Apr. 28, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Srinivas Pietambaram, Chandler, AZ (US);

Kristof Darmawikarta, Chandler, AZ (US);

Gang Duan, Chandler, AZ (US);

Yonggang Li, Chandler, AZ (US);

Sameer Paital, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01F 27/26 (2006.01); H01F 27/42 (2006.01); H01L 21/768 (2006.01); H01L 23/64 (2006.01); H01F 27/245 (2006.01); H01F 27/25 (2006.01);
U.S. Cl.
CPC ...
H01F 27/26 (2013.01); H01F 27/425 (2013.01); H01L 21/76871 (2013.01); H01L 23/645 (2013.01); H01F 27/245 (2013.01); H01F 27/25 (2013.01);
Abstract

Described are microelectronic devices including an embedded microelectronic package for use as an integrated voltage regulator with a microelectronic system. The microelectronic package can include a substrate and a magnetic foil. The substrate can define at least one layer having one or more of electrically conductive elements separated by a dielectric material. The magnetic foil can have ferromagnetic alloy ribbons and can be embedded within the substrate adjacent to the one or more of electrically conductive elements. The magnetic foil can be positioned to interface with and be spaced from the one or more of electrically conductive element.


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