The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Nov. 15, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Bo-Yu Lai, Taipei, TW;

Kai-Hsuan Lee, Hsinchu, TW;

Wei-Yang Lee, Taipei, TW;

Feng-Cheng Yang, Hsinchu County, TW;

Yen-Ming Chen, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 29/0653 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/31111 (2013.01);
Abstract

A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.


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