The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2025
Filed:
Jul. 28, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chung-Wei Hsu, Hsinchu County, TW;
Kuo-Cheng Chiang, Hsinchu County, TW;
Mao-Lin Huang, Hsinchu, TW;
Lung-Kun Chu, New Taipei, TW;
Jia-Ni Yu, New Taipei, TW;
Kuan-Lun Cheng, Hsin-Chu, TW;
Chih-Hao Wang, Hsinchu County, TW;
TAIWAN SEMICONDICTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A structure has stacks of semiconductor layers over a substrate and adjacent a dielectric feature. A gate dielectric is formed wrapping around each layer and the dielectric feature. A first layer of first gate electrode material is deposited over the gate dielectric and the dielectric feature. The first layer on the dielectric feature is recessed to a first height below a top surface of the dielectric feature. A second layer of the first gate electrode material is deposited over the first layer. The first gate electrode material in a first region of the substrate is removed to expose a portion of the gate dielectric in the first region, while the first gate electrode material in a second region of the substrate is preserved. A second gate electrode material is deposited over the exposed portion of the gate dielectric and over a remaining portion of the first gate electrode material.