The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 2024
Filed:
Mar. 02, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chao-Hsun Wang, Taoyuan, TW;
Kuo-Yi Chao, Hsinchu, TW;
Rueijer Lin, Hsinchu, TW;
Chen-Yuan Kao, Zhudong Township, Hsinchu County, TW;
Mei-Yun Wang, Chu-Pei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A method for forming a FinFET device structure is provided. The method includes forming a gate dielectric layer over a fin structure. The method also includes forming a gate electrode layer over the gate dielectric layer. The method further includes forming a first dielectric layer formed over the gate dielectric layer. In addition, the method includes forming a first conductive layer on the gate dielectric layer. A bottom surface of the first conductive layer is in direct contact a top surface of the gate electrode layer, a sidewall of the first conductive layer is in direct contact the first dielectric layer and spaced apart from the gate dielectric layer.