The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Feb. 12, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chih-Hang Tung, Hsinchu, TW;

Chen-Hua Yu, Hsinchu, TW;

Tung-Liang Shao, Hsinchu, TW;

Su-Chun Yang, Hsinchu County, TW;

Wen-Lin Shih, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 21/768 (2006.01); H01L 23/373 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); H01L 21/50 (2013.01); H01L 21/76802 (2013.01); H01L 21/76841 (2013.01); H01L 21/76877 (2013.01); H01L 23/3736 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer, an etch stop layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The etch stop layer includes silicon nitride and is disposed between the semiconductor substrate and the electrical insulating and thermal conductive layer. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.


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