The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2024
Filed:
Dec. 21, 2020
Intel Corporation, Santa Clara, CA (US);
Aaron J. Welsh, Portland, OR (US);
Christopher M. Pelto, Beaverton, OR (US);
David J. Towner, Portland, OR (US);
Mark A. Blount, Portland, OR (US);
Takayoshi Ito, Hillsboro, OR (US);
Dragos Seghete, Portland, OR (US);
Christopher R. Ryder, Portland, OR (US);
Stephanie F. Sundholm, Hillsboro, OR (US);
Chamara Abeysekera, Hillsboro, OR (US);
Anil W. Dey, Portland, OR (US);
Che-Yun Lin, Portland, OR (US);
Uygar E. Avci, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.