The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
Feb. 13, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Ali Keshavarzi, Los Altos Hills, CA (US);
Ta-Pen Guo, Taipei, TW;
Shu-Hui Sung, Hsinchu County, TW;
Hsiang-Jen Tseng, Hsinchu, TW;
Shyue-Shyh Lin, Hsinchu County, TW;
Lee-Chung Lu, Taipei, TW;
Chung-Cheng Wu, Hsin-Chu County, TW;
Li-Chun Tien, Tainan, TW;
Jung-Chan Yang, Taoyuan County, TW;
Ting Yu Chen, Hsinchu, TW;
Min Cao, Hsinchu, TW;
Yung-Chin Hou, Taipei, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
An integrated circuit includes a first diffusion area for a first type transistor. The first type transistor includes a first drain region and a first source region. A second diffusion area for a second type transistor is separated from the first diffusion area. The second type transistor includes a second drain region and a second source region. A gate electrode continuously extends across the first diffusion area and the second diffusion area in a routing direction. A first metallic structure is electrically coupled with the first source region. A second metallic structure is electrically coupled with the second drain region. A third metallic structure is disposed over and electrically coupled with the first and second metallic structures. A width of the first metallic structure is substantially equal to or larger than a width of the third metallic structure.