The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2024

Filed:

Sep. 14, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Han-Tang Hung, Hsinchu, TW;

Shin-Yi Yang, New Taipei, TW;

Ming-Han Lee, Taipei, TW;

Shau-Lin Shue, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2023.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/485 (2006.01); H01L 23/58 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/78 (2013.01); H01L 23/3107 (2013.01); H01L 23/485 (2013.01); H01L 23/585 (2013.01); H01L 24/16 (2013.01); H01L 25/50 (2013.01); H01L 2224/16225 (2013.01);
Abstract

Embodiments of the present disclosure provide a semiconductor package comprising a first integrated circuit (IC) die having a first back-end-of-the-line (BEOL) structure, a second integrated circuit die having a second BEOL structure, an integrated BEOL structure having a first side in direct contact with both the first BEOL structure and the second BEOL structure. In some embodiments, a substrate is further disposed at a second side of the integrated BEOL structure to support both the first integrated circuit die and the second integrated circuit die.


Find Patent Forward Citations

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Hung, Han-Tang. (2024). Semiconductor packages and methods for forming the same (U.S. Patent No. 12051683). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12051683

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