The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2024

Filed:

Oct. 31, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Cheng-Yu Yang, Changhua County, TW;

Yen-Ting Chen, Hsinchu, TW;

Wei-Yang Lee, Taipei, TW;

Fu-Kai Yang, Hsinchu, TW;

Yen-Ming Chen, Hsin-Chu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/033 (2006.01); H01L 21/8238 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823468 (2013.01); H01L 21/0337 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823475 (2013.01); H01L 21/823864 (2013.01); H01L 27/0886 (2013.01); H01L 29/0649 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.


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