The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Jun. 26, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nazila Haratipour, Portland, OR (US);

Sou-Chi Chang, Portland, OR (US);

Shriram Shivaraman, Hillsboro, OR (US);

I-Cheng Tung, Hillsboro, OR (US);

Tobias Brown-Heft, Portland, OR (US);

Devin R. Merrill, McMinnville, OR (US);

Che-Yun Lin, Beaverton, OR (US);

Seung Hoon Sung, Portland, OR (US);

Jack Kavalieros, Portland, OR (US);

Uygar Avci, Portland, OR (US);

Matthew V. Metz, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 53/00 (2023.01); G11C 11/22 (2006.01); H01G 4/008 (2006.01); H01L 27/08 (2006.01); H01L 49/02 (2006.01); H10B 53/10 (2023.01);
U.S. Cl.
CPC ...
H10B 53/00 (2023.02); G11C 11/221 (2013.01); H01G 4/008 (2013.01); H01L 27/0805 (2013.01); H01L 28/65 (2013.01); H10B 53/10 (2023.02);
Abstract

An integrated circuit capacitor structure, includes a first electrode includes a cylindrical column, a ferroelectric layer around an exterior sidewall of the cylindrical column and a plurality of outer electrodes. The plurality of outer electrodes include a first outer electrode laterally adjacent to a first portion of an exterior of the ferroelectric layer and a second outer electrode laterally adjacent to a second portion of the exterior of the ferroelectric layer, wherein the second outer electrode is above the first outer electrode.


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