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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12046560 B1

PDFFull Text
Date of Patent:
Jul. 23, 2024

Filed:

Dec. 17, 2021

Microelectronic device with embedded die substrate on interposer

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Robert Alan May, Chandler, AZ (US);

Islam A. Salama, Chandler, AZ (US);

Sri Ranga Sai Boyapati, Chandler, AZ (US);

Sheng Li, Gilbert, AZ (US);

Kristof Darmawikarta, Chandler, AZ (US);

Robert L. Sankman, Phoenix, AZ (US);

Amruthavalli Pallavi Alur, Tempe, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Schwabe, Williamson & Wyatt, P.C.

Primary Examiner:

Ida M Soward

Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01); H01L 25/07 (2006.01); H01L 25/11 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/56 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 24/19 (2013.01); H01L 24/25 (2013.01); H01L 24/82 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/071 (2013.01); H01L 25/112 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/22 (2013.01); H01L 2224/224 (2013.01); H01L 2224/24226 (2013.01); H01L 2224/73103 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/73203 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73209 (2013.01); H01L 2224/73217 (2013.01); H01L 2224/73267 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A microelectronic device is formed to include an embedded die substrate on an interposer; where the embedded die substrate is formed with no more than a single layer of transverse routing traces. In the device, all additional routing may be allocated to the interposer to which the embedded die substrate is attached. The embedded die substrate may be formed with a planarized dielectric formed over an initial metallization layer supporting the embedded die.

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