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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11948949 B1

PDFFull Text
Date of Patent:
Apr. 02, 2024

Filed:

Jul. 15, 2022

Vertical gate field effect transistor

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chun-Yuan Chen, Tainan, TW;

Ching-Chun Wang, Tainan, TW;

Hsiao-Hui Tseng, Tainan, TW;

Jen-Cheng Liu, Hsin-Chu, TW;

Jhy-Jyi Sze, Hsin-Chu, TW;

Shyh-Fann Ting, Tainan, TW;

Wei Chuang Wu, Tainan, TW;

Yen-Ting Chiang, Tainan, TW;

Chia Ching Liao, Tainan, TW;

Yen-Yu Chen, Kaohsiung, TW;

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Attorney:

Eschweiler & Potashnik, LLC

Primary Examiner:

Tucker J Wright

Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14614 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/14645 (2013.01); H01L 27/14689 (2013.01); H01L 29/4236 (2013.01); H01L 29/42376 (2013.01);
Abstract

In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.

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