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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11948930 B1

PDFFull Text
Date of Patent:
Apr. 02, 2024

Filed:

Nov. 13, 2020

Semiconductor package and method of manufacturing the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chin-Chuan Chang, Zhudong Township, TW;

Szu-Wei Lu, Hsinchu, TW;

Chen-Hua Yu, Hsinchu, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Anthony Ho

Assistant Examiner:

David J Goodwin

Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 21/66 (2006.01); H01L 21/683 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/6836 (2013.01); H01L 21/76898 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/18 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/17181 (2013.01);
Abstract

A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

Find Patent Forward Citations

Chang, Chin-Chuan. (2024). Semiconductor package and method of manufacturing the same (U.S. Patent No. 11948930). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11948930

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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