The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Aug. 03, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Po-Yu Huang, Hsinchu, TW;

Shih-Che Lin, Hsinchu, TW;

Chao-Hsun Wang, Chung-Li, TW;

Kuo-Yi Chao, Hsinchu, TW;

Mei-Yun Wang, Chu-Pei, TW;

Feng-Yu Chang, Kaohsiung, TW;

Rueijer Lin, Hsinchu, TW;

Chen-Yuan Kao, Zhudong Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/401 (2013.01); H01L 21/31144 (2013.01); H01L 21/7684 (2013.01); H01L 21/76895 (2013.01); H01L 29/41725 (2013.01); H01L 29/4232 (2013.01);
Abstract

Vertical interconnect structures and methods of forming are provided. The vertical interconnect structures may be formed by partially filling a first opening through one or more dielectric layers with layers of conductive materials. A second opening is formed in a dielectric layer such that a depth of the first opening after partially filling with the layers of conductive materials is close to a depth of the second opening. The remaining portion of the first opening and the second opening may then be simultaneously filled.


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