The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Jul. 01, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yung-Chi Lin, New Taipei, TW;

Chen-Hua Yu, Hsinchu, TW;

Tsang-Jiuh Wu, Hsinchu, TW;

Wen-Chih Chiou, Miaoli County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/535 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 25/065 (2023.01); H01L 25/00 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 24/06 (2013.01); H01L 23/3677 (2013.01); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/06519 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06589 (2013.01);
Abstract

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a semiconductor substrate, an interconnection structure, through substrate vias, conductive pillars and dummy conductive pillars. The interconnection structure is disposed at a front side of the semiconductor substrate, and comprises a stack of dielectric layers and interconnection elements spreading in the stack of dielectric layers. The through substrate vias separately penetrate through the semiconductor substrate and the stack of dielectric layers. The conductive pillars are disposed at a front side of the interconnection structure facing away from the semiconductor substrate, and respectively in electrical connection with one of the through substrate vias. The dummy conductive pillars are disposed aside the conductive pillars at the front side of the interconnection structure.


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